Issues Realting to How to Derate Transistors and Resulting Failures

There are two main pages in this section of the web site; How to derate Transistors by Temperature [Power x Temperature], and Diode Derating [Current x Temperature]. An interrelated page details how to read and Interpret Temperature Derating Curves, which works for diodes or transistors.

 One of the new pages covers component mounting consideration, as Lead Length vs Thermal Resistance [power dissipation for leaded parts]. This particular topic shows why lead length is an important consideration in component power dissipation [in addition to increased circuit inductance]. A companion page covers Copper Pad Area vs Thermal Resistance, to address surface mount components.

The second new page covers Junction Temperature and Wirebond Life, the bond holding the wire between the semiconductor chip and package lead frame. Wire-Bond failure rate vs junction temperature is another way to cover the same topic as the derating charts already do; However, some derating curves do cover ambient temperature, heat-sink temperature and case temperature, in addition to junction temperature.

Related links include Maximum Safe Operating Area,
Over the last 30 days I have added almost 30 new pages, but they were so inter-related that I didn't think blogging about them would really help. Either each blog posting would read almost the same or they would have had almost no text. So I'll generated a new xml site-map for Google in a few weeks to catch the new pages, or wait until Google reads the pages their linked from. In the mean time I have been adding links to the new pages to the human readable [html] sitemap that covers the site [Engineering Site-Map].

So these are two of the nearly 30 new pages added over the last month. I may add them in a larger posting rather than one posting per new page.