Friday, October 23, 2009
What are Serial Buses
Now what about the 16x PCIe interface? PCIe 16x has 16 differential pairs going in each direction [16 Tx and 16 Rx], and it still has the JTAG and SMbus interfaces. That's 164 traces for PCIe once you count all the ground lines. At least some serial buses like CanBus use one net [pair], or a differential pair but it still requires a 9-pin D-sub connector.
How is that different from an 8-bit, 16-bit, 32-bit or 64-bit parallel bus? The PCI bus only uses 188 pins to develop a 64-bit bus, that's only 20 more nets than PCIe and you get a lot more control pins.
So you get your requirement to interface two boards together and your told that one of the boards is I/O constrained, do you walk into a design review and say you serial bus implementation requires 164 nets?
The first digital bus I ever designed to was the GPIB interface, the old byte serial, bit parallel interface. So I really already know what the difference between a serial bus and parallel bus is; A Serial bus transmits a byte sequentially one bit at a time, while a parallel bus sends the entire byte out at once over individual lines. There is no limitation on the number of pins for a serial bus, but I would assume the normal assumption would be less than a dozen nets at most.
The point is a new page was added covering the Serial Wire Debug Interface, one of the true serial buses. Well maybe not, looks like it needs power and ground and resides on a ten pin header. Maybe IC to IC communication on the same PCB only requires just two nets, I'll have to do a bit more research on the topic.
Of course any copper wire parallel bus will be lighter weight than a hydraulic control system. With less lines, a serial bus should be lighter still, requiring less wires than a parallel interface. Better yet a network designed to operate over an Optical fiber would come with the lowest weight penalty.
With the cost of putting metal into space being about $10,000/pound the best design would be the safest, most reliably and the lowest weight. The same is true for any Avionic Bus Design. The Protocol may not set the maximum weight of the bus but an interface's protocol sets the minimum safety requirements of an interface and monitors and adds to a buses reliably.
Graphic; Comparison of different size NASA rockets: Saturn V, Space Shuttle, Ares I, Ares IV, and Ares V.
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Wednesday, September 9, 2009
Sony's DMP Interface
I added a new page the other day to cover the Digital Media Port [DMP] interface. The bus was developed by Sony and only resides on their gear. The page lists one possible pin out, and I don't know if there may be others. I have no other information on the interface.
Digital Media Port
The page is linked from these two pages;
Engineering Interface Buses, 'D'.
Cable and Backplane Buses.
Because this bus is only being used by Sony I may not be able to find any additional data.
Saturday, July 4, 2009
VPX Computer Board Format
Added two new pages a few weeks ago relating to VPX boards which is the new style of VME card.
I didn't list them because I was not able to verify the data, but I'll list them now regardless.
I just checked and the new pages have not been found by Google yet, but Google will find the VPX pages today with this posting.
VPX Signal Assignments;
Pinout for the VPX J0 Connector.
Pinout for the VPX J1 / J2 Connector.
Both VPX pin out pages are linked off the VPX Board Description page.
Additional pages related to the VME standard;
VITA 48, REDI Standard.
VPX Board Manufacturers.
VXS Board Manufacturers.
VME Backplane manufacturers.
VME Chassis Manufacturers.
VME Bus Definition.
There are additional pages related to the VME format, not listed here.