Low Profile BGA packages.

I added a new page to cover a Low-Profile Ball Grid Array or LBGA. For some of these pages I provide package dimensions, but I didn't bother this time. I'm not even sure if the exact height of an LBGA is set or if it's more of an industry standard.

A related page covers a normal Ball Grid Array. Right now the page is a changed copy of the BGA page so I still may need to make some changes. But the important thing is that I got the new page added tonight before I got side track with fixing some other page. The new page is linked off the page that covers Surface Mount IC Packages.

Although BGA style packages are not used for processors in PCs they are used for a number of other components within a PC. Pin Grid Arrays are used for PC processors, while BGA style devices are used for memory and chip sets.

However BGA devices are used to great extend in industry, not because they always have more pins than a PGA but because BGAs are surface mount devices. Normally it's preferred to have all surface mount devices or all through hole devices during board construction.

High Power Transistor Packages

Transistor packages usually use the nomenclature TO-xx, where TO stands for Transistor Outline.  There are a number of transistor packages that will handle high power or high current, but it also depends on the semiconductor inside the packages.

A number of different transistor packages have been added over the last month, several can handle higher power loads. One package style is the TO-3 flange mount body. The TO-3 style dissipates a lot of heat because of the large metal package and because the metal flange is normally mounted to an even larger metal plate to dissipate even more heat. The most common TO-3 package holds two leads, with the case acting as the third terminal. Two additional new TO-3 related pages were added; the first a 4-lead TO-3 package, and the second an 8-lead TO-3 package.

Another through hole style high power package is the TO-220, although this one has a metal tab to dissipate heat. The 3 terminal package already resided on the site; however a 5-terminal TO-220 and a 7-Lead TO-220 package were added. The 7-leaded package has staggered leads, and there's an additional 5-Staggered Terminal TO-220 package to compliment it. Either of the new packages are designed to hold more than just a single transistor or FET; operational amplifiers in the case of the TO-3 package or regulators in the case of the TO-220 packages.

The other high power transistor case is the TO-263, or the surface mount version of the TO-220. There's a 3-terminal version, a 5-Terminal TO-263 package and a 7-Terminal TO-263 package.

It's easy to determine the number of pins required for a particular package, normally the function will dictate the number of leads. However it's a bit harder to pick the correct package style. So these are a few of the transistor package styles designed to dissipate high heat on the site.

Issues Realting to How to Derate Transistors and Resulting Failures

There are two main pages in this section of the web site; How to derate Transistors by Temperature [Power x Temperature], and Diode Derating [Current x Temperature]. An interrelated page details how to read and Interpret Temperature Derating Curves, which works for diodes or transistors.

 One of the new pages covers component mounting consideration, as Lead Length vs Thermal Resistance [power dissipation for leaded parts]. This particular topic shows why lead length is an important consideration in component power dissipation [in addition to increased circuit inductance]. A companion page covers Copper Pad Area vs Thermal Resistance, to address surface mount components.

The second new page covers Junction Temperature and Wirebond Life, the bond holding the wire between the semiconductor chip and package lead frame. Wire-Bond failure rate vs junction temperature is another way to cover the same topic as the derating charts already do; However, some derating curves do cover ambient temperature, heat-sink temperature and case temperature, in addition to junction temperature.

Related links include Maximum Safe Operating Area,
Over the last 30 days I have added almost 30 new pages, but they were so inter-related that I didn't think blogging about them would really help. Either each blog posting would read almost the same or they would have had almost no text. So I'll generated a new xml site-map for Google in a few weeks to catch the new pages, or wait until Google reads the pages their linked from. In the mean time I have been adding links to the new pages to the human readable [html] sitemap that covers the site [Engineering Site-Map].

So these are two of the nearly 30 new pages added over the last month. I may add them in a larger posting rather than one posting per new page.

TO-205 FET Package

A new page holding a graphic of a TO-205 Metal Can was generated. This particular page gives the pinout for an FET, with the transistor pinout to be added later. As with any of the pages, this is linked off the FET Packages page.

SOT-23 Transistor Package

Another transistor package page was just generated. The new page covers a SOT-23 Package [TO-236AA]. The physical dimensions are provided for the SOT-23 transistor package, but I'm not really sure if the TO-236AA would use the same numbers.

The SOT-23 page is linked off the Transistor Packages page, and was added to the Sitemap. That brings about a total of 23 pages in that section.